cpuid | CPU feature identification for Go

 by   klauspost Go Version: v2.2.4 License: MIT

kandi X-RAY | cpuid Summary

kandi X-RAY | cpuid Summary

cpuid is a Go library typically used in Internet of Things (IoT), Raspberry Pi applications. cpuid has no bugs, it has no vulnerabilities, it has a Permissive License and it has medium support. You can download it from GitHub.

Package cpuid provides information about the CPU running the current program. CPU features are detected on startup, and kept for fast access through the life of the application. Currently x86 / x64 (AMD64/i386) and ARM (ARM64) is supported, and no external C (cgo) code is used, which should make the library very easy to use. You can access the CPU information by accessing the shared CPU variable of the cpuid library.

            kandi-support Support

              cpuid has a medium active ecosystem.
              It has 806 star(s) with 105 fork(s). There are 22 watchers for this library.
              It had no major release in the last 12 months.
              There are 2 open issues and 41 have been closed. On average issues are closed in 120 days. There are no pull requests.
              It has a neutral sentiment in the developer community.
              The latest version of cpuid is v2.2.4

            kandi-Quality Quality

              cpuid has 0 bugs and 0 code smells.

            kandi-Security Security

              cpuid has no vulnerabilities reported, and its dependent libraries have no vulnerabilities reported.
              cpuid code analysis shows 0 unresolved vulnerabilities.
              There are 0 security hotspots that need review.

            kandi-License License

              cpuid is licensed under the MIT License. This license is Permissive.
              Permissive licenses have the least restrictions, and you can use them in most projects.

            kandi-Reuse Reuse

              cpuid releases are available to install and integrate.
              Installation instructions are not available. Examples and code snippets are available.
              It has 1850 lines of code, 75 functions and 14 files.
              It has high code complexity. Code complexity directly impacts maintainability of the code.

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            cpuid Key Features

            No Key Features are available at this moment for cpuid.

            cpuid Examples and Code Snippets

            No Code Snippets are available at this moment for cpuid.

            Community Discussions


            How do I detect QEMU emulation from within a Docker container?
            Asked 2022-Mar-28 at 07:26

            From within a docker container (in my case running a Debian Busty based image) how can I detect whether it's running under QEMU emulation (as happens on ARM Macs for AMD64 images)?

            From the non-docker perspective I've seen suggestion that cpuinfo might surface this, but it doesn't yield anything directly QEMU related when run from inside my container:



            Answered 2022-Mar-28 at 07:26

            There are more ways to detect that the container is running under the emulation, however the most reliable way is to use identify if the entry point is emulated.

            When a container is created, the entry point will become the PID 1. The mechanism that Docker uses for the qemu emulation will detect that the entry point is for a different architecture and will involve the emulator to emulate the architecture. You can read more about the mechanism used in this post.

            Since the entry point will be emulated, the process name will be replaced with the qemu-xxxx where the xxxx is the architecture that will be emulated. We can identify if our entry pint process was substituted for qemu if we call ps -uax as in the following example:

            Source https://stackoverflow.com/questions/70116861


            C function for combining an array of strings into a single string in a loop and return the string after freeing the allocated memory
            Asked 2022-Mar-18 at 07:54

            I'm working on a procfs kernel extension for macOS and trying to implement a feature that emulates Linux’s /proc/cpuinfo similar to what FreeBSD does with its linprocfs. Since I'm trying to learn, and since not every bit of FreeBSD code can simply be copied over to XNU and be expected to work right out of the jar, I'm writing this feature from scratch, with FreeBSD and NetBSD's linux-based procfs features as a reference. Anyways...

            Under Linux, $cat /proc/cpuinfo showes me something like this:



            Answered 2022-Mar-18 at 07:54

            There is no need to allocate memory for this task: pass a pointer to a local array along with its size and use strlcat properly:

            Source https://stackoverflow.com/questions/71518714


            How do I write inline assembly for `"={ecx}"(features)` in stable Rust?
            Asked 2022-Mar-16 at 07:22

            I have the following inline assembly which used to work in Rust, but it seems there has been some changes to the syntax, and it throws error at "={ecx}(features) with the message expected type. How can I rewrite this in new assembly syntax?



            Answered 2022-Mar-16 at 07:22


            What calling convention should I use to make things portable?
            Asked 2022-Mar-11 at 03:23

            I am writing a C interface for CPU's cpuid instruction. I'm just doing this as kind of an exercise: I don't want to use compiler-depended headers such as cpuid.h for GCC or intrin.h for MSVC. Also, I'm aware that using C inline assembly would be a better choice, since it avoids thinking about calling conventions (see this implementation): I'd just have to think about different compiler's syntaxes. However I'd like to start practicing a bit with integrating assembly and C.

            Given that I now have to write a different assembly implementation for each major assembler (I was thinking of GAS, MASM and NASM) and for each of them both for x86-64 and x86, how should I handle the fact that different machines and C compilers may use different calling conventions?



            Answered 2022-Mar-11 at 03:23

            If you really want to write, as just an exercise, an assembly function that "conforms" to all the common calling conventions for x86_64 (I know only the Windows one and the System V one), without relying on attributes or compiler flags to force the calling convention, let's take a look at what's common.

            The Windows GPR passing order is rcx, rdx, r8, r9. The System V passing order is rdi, rsi, rdx, rcx, r8, r9. In both cases, rax holds the return value if it fits and is a piece of POD. Technically speaking, you can get away with a "polyglot" called function if it (0) saves the union of what each ABI considers non-volatile, and (1) returns something that can fit in a single register, and (2) takes no more than 2 GPR arguments, because overlap would happen past that. To be absolutely generic, you could make it take a single pointer to some structure that would hold whatever arbitrary return data you want.

            So now our arguments will come through either rcx and rdx or rdi and rsi. How do you tell which will contain the arguments? I'm actually not sure of a good way. Maybe what you could do instead is have a wrapper that puts the arguments in the right spot, and have your actual function take "padding" arguments, so that your arguments always land in rcx and rdx. You could technically expand to r8 and r9 this way.

            Source https://stackoverflow.com/questions/71361589


            Replicate password obfuscation to programatically login to a website with curl
            Asked 2022-Feb-27 at 08:55

            I want to submit/simulate a login webform with curl. I'm using....



            Answered 2022-Feb-27 at 08:55

            Basically, yes it ended up being SHA1. I grabbed a SHA1 script from here and added it to Google Sheets scripts to generate the hash. I chose Sheets only because I already had a doc I was sharing with non technical folks which builds up the curl query to run with some defined variables.

            Here's the relevant code in case the link goes down...

            Source https://stackoverflow.com/questions/71271559


            mwaitx instruction not blocking
            Asked 2022-Feb-24 at 07:36

            According to AMD's official docs, the mwaitx instruction can be used with the monitorx instruction to monitor an address range and see if it is modified. My code seems to be returning immediately, seemingly doing nothing.

            The code in question:



            Answered 2022-Feb-24 at 07:36

            The documentation in AMD's manual (vol 3, rev 3.33) does not say that ECX[0] = 0 will mask interrupts even if IF=1 in E/RFLAGS. It would be insane for user-space to be able to do that without having IO privilege level = 0 (which would allow you to run a cli instruction), and the wording doesn't really hint at it.

            In user-space, there should be no way to get a CPU stuck in a way that would make it hard for the kernel to wake it up! If you want to go for longer before asking the OS to put this thread to sleep (e.g. with Linux futex to wake you back up on memory change), you could use it in a loop exactly like a spin-wait loop that uses pause or something. From the OS's perspective it'd be the same: this thread is occupying the CPU for the entire time.

            It's likely that your code does actually arm the monitor and enter the optimized sleep state, but wakes on the next timer interrupt after at most a few milliseconds. Check with rdtsc to see how long it sleeps for, because human perception of screen output can't distinguish that from failing to sleep at all.

            What the documentation actually does say about the supported extension flags in ECX:

            Bit 0: When set, allows interrupts to wake MWAITX, even when eFLAGS.IF = 0. Support for this extension is indicated by a feature flag returned by the CPUID instruction.

            So, as an extension, you can override the fact that interrupts are disabled in eFLAGS, to make sure you don't enter a sleep state that lasts until an NMI. Otherwise, with ECX[0] = 0, all previous stuff in the documentation applies, including:

            Events that cause an exit from the monitor event pending state include:

            • A store from another processor matches the address range established by the MONITORX instruction.
            • The timer expires.
            • Any unmasked interrupt, including INTR, NMI, SMI, INIT.
            • RESET.
            • Any far control transfer that occurs between the MONITORX and the MWAITX.

            If you actually did want to do put the CPU into a sleep that wouldn't be ended by pending interrupts, you'd use cli before monitorx / mwaitx. Or use traditional monitor / mwait if you're in kernel mode proper, rather than user-space after a Linux iopl() system call or other way of getting IOPL=0 with CPL=3 (current privilege level), so you can't run privileged instructions in general, only the specific ones allowed by the IO privilege level, like in/out / cli/sti.


            There is no indication after exiting MWAITX of why the processor exited or if the timer expired. It is up to software to check whether the awaiting store has occurred, and if not, determining how much time has elapsed if it wants to re-establish the MONITORX with a new timer value.

            BTW, if you don't want the timer to be a possible exit condition, you can just leave ECX[1] = 0

            Bit 1: When set, EBX contains the maximum wait time expressed in Software P0 clocks, the same clocks counted by the TSC. Setting bit 1 but passing in a value of zero on EBX is equivalent to setting bit 1 to a zero. The timer will not be an exit condition.

            And BTW, EAX=0 isn't "no hints"; EAX[7:4] is always the desired C-state level, encoded at C-state - 1. So EAX=0 hints that you want C1 state. (To hint that you want C0 state, a less deep sleep that's faster to wake from, you'd set EAX = 0xf0, because F + 1 = 0.)

            It's also pointless to do xor rax,rax instead of xor eax,eax; writing a 32-bit register implicitly zeroes the upper bits of the full 64-bit register, so there's no false dependency. And there's no need to tempt the assembler into wasting a REX prefix to actually encode it as written. The MWAITX implicit input registers are all 32-bit anyway, so xor ecx, ecx would also be appropriate.

            Also, r9 is call-clobbered (aka volatile) in the Windows x64 calling convention; you can just use it without saving/restoring, along with r8..r11.

            And no you don't have to run a cpuid every time you want to do monitorx / mwaitx! AMD's documentation says you need to check once per program / library init, but there's no way the CPU can actually enforce that. It's not going to track across context switches which user-space process has actually run a CPUID.

            Source https://stackoverflow.com/questions/71241346


            What is the correct syntax for AMD monitorx instruction?
            Asked 2022-Feb-24 at 04:43

            Ryzen supports the monitorx instructions, as indicated by the cpuid flag. Unfortunately the visual studio masm assembler doesn't seem to like these instructions, and there is very little documentation online for how to use them.

            The following code (which is very based on AMD's own documentation) reports the error A2070 "invalid instruction operands:



            Answered 2022-Feb-23 at 15:04

            The problem is that eax, ecx, and edx are 32 bit registers, but it was being assembled in 64 bit mode. Because the first operand is pointer size, it must be 64 bits. The following code will work on 64 bit programs:

            Source https://stackoverflow.com/questions/71238273


            Stuck while optimizing a segmented prime sieve in C
            Asked 2022-Jan-17 at 00:00

            I'm trying to implement an efficient segmented prime sieve in C. It's basically a sieve of Eratosthenes, but each segment is split to a size that can well fit in cache.

            In my version, there is a bit array of flags in which each bit is a consecutive odd number. Each bit is erased by masking with AND when it is a multiple of a known prime number.

            This single part of code consumes about 90% of runtime. Each dirty bit of code has a reason for it that I explained in comments, but the overall operation is very simple.

            1. Grab a prime number.
            2. Calculate its square and its multiple that is slightly bigger than the number that the starting point of the cache block represents.
            3. Take the bigger one.
            4. Erase the bit, add the base prime number to itself two times, and repeat until the end of the cache block.

            And that's it.

            There is a program called primesieve which can do this operation very fast. It is about 3 times faster than my version. I read its documentation about the algorithm and also its code, and applied whatever is plausible to my code.

            Since there is a known program a lot faster than mine, I will investigate further what they're doing and what I'm not, but before that, I posted this question to get extra help if you can help me find out which part is not running efficiently.

            Saying again, this single routine consumes 90% of runtime, so I'm really focused on making this part run faster.

            This is the old version, I've made some modifications after the post, and that one's below this one. The comments still apply.



            Answered 2022-Jan-16 at 20:45

            You might be sieving, but what about counting? And a upper limit, so one can compare? And OMP like primesieve?

            You are stuck because you are not even counting or comparing, only with yourself.

            I made a segmented sieve just with a 30Kb char array. At 2 billion, it takes quite exactly 3 times as long as primesieve, and works with OMP. So all your bit mapping and unrolling is not measurable.

            Source https://stackoverflow.com/questions/70729093


            Why does this program print characters repeatedly, when they only appear in heap memory once?
            Asked 2021-Dec-31 at 23:21

            I wrote a small program to explore out-of-bounds reads vulnerabilities in C to better understand them; this program is intentionally buggy and has vulnerabilities:



            Answered 2021-Dec-31 at 23:21

            Since stdout is line buffered, putchar doesn't write to the terminal directly; it puts the character into a buffer, which is flushed when a newline is encountered. And the buffer for stdout happens to be located on the heap following your heap_book allocation.

            So at some point in your copy, you putchar all the characters of your secretinfo method. They are now in the output buffer. A little later, heap_book[i] is within the stdout buffer itself, so you encounter the copy of secretinfo that is there. When you putchar it, you effectively create another copy a little further along in the buffer, and the process repeats.

            You can verify this in your debugger. The address of the stdout buffer, on glibc, can be found with p stdout->_IO_buf_base. In my test it's exactly 160 bytes past heap_book.

            Source https://stackoverflow.com/questions/70545319


            Puppeteer not working NodeJS 17 on Arch Linux
            Asked 2021-Nov-28 at 07:25

            I've started working with Puppeteer and for some reason I cannot get it to work on my box. This error seems to be a common problem (SO1, SO2) but all of the solutions do not solve this error for me. I have tested it with a clean node package (see reproduction) and I have taken the example from the official Puppeteer 'Getting started' webpage.

            How can I resolve this error?

            Versions and hardware ...


            Answered 2021-Nov-24 at 18:42

            There's too much for me to put this in a comment, so I will summarize here. Maybe it will help you, or someone else. I should also mention this is for RHEL EC2 instances behind a corporate proxy (not Arch Linux), but I still feel like it may help. I had to do the following to get puppeteer working. This is straight from my docs, but I had to hand-jam the contents because my docs are on an intranet.

            I had to install all of these libraries manually. I also don't know what the Arch Linux equivalents are. Some are duplicates from your question, but I don't think they all are:
            pango libXcomposite libXcursor libXdamage libXext libXi libXtst cups-libs libXScrnSaver libXrandr GConf2 alsa-lib atk gtk3 ipa-gothic-fonts xorg-x11-fonts-100dpi xorg-x11-fonts-75dpi xorg-x11-utils xorg-x11-fonts-cyrillic xorg-x11-fonts-Type1 xorg-x11-fonts-misc liberation-mono-fonts liberation-narrow-fonts liberation-narrow-fonts liberation-sans-fonts liberation-serif-fonts glib2

            If Arch Linux uses SELinux, you may also have to run this:
            setsebool -P unconfirmed_chrome_sandbox_transition 0

            It is also worth adding dumpio: true to your options to debug. Should give you a more detailed output from puppeteer, instead of the generic error. As I mentioned in my comment. I have this option ignoreDefaultArgs: ['--disable-extensions']. I can't tell you why because I don't remember. I think it is related to this issue, but also could be related to my corporate proxy.

            Source https://stackoverflow.com/questions/70032857

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