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QUESTION
I don't know how to interpolate in PySpark when the DataFrame contains many columns. Let me xplain.
...ANSWER
Answered 2020-Dec-01 at 11:09Set the environment variable ARROW_PRE_0_15_IPC_FORMAT=1
.
QUESTION
I can't seem to figure out how to send a pointer to a struct using a queue in FreeRTOS. I've tried all I could think of, yet I always get a pointer to some random region of memory.
I'm trying to send a pointer to a button struct to another task, where it will then be drawn on the screen. I tried sending the whole object and it worked, but since there's a lot of data in the struct (data of two icons) I don't really want to do that.
The code is being run in Atmel SAME70 Xplained.
Here is a simpler version of the code I'm working on:
...ANSWER
Answered 2020-May-14 at 17:22It appears from the API that the xQueueSend does a copy via the pointer passed so if you want to pass a pointer on the queue you need to pass the address of a pointer that is pointing at your structure.
QUESTION
I am following Bootlin's embedded Linux training which aims to put an embedded Linux system on an Atmel SAMA5D4 Xplained board (theory slides, practical lab instructions) and I am stuck a putting the whole system on the NAND flash.
They ask me to put the DTB, the kernel, the root filesystem and a data filesystem in a UBI image to be written to the flash but I cannot access the UBI partitions once I flashed it (the access fails with error code 22, or -22 in an embedded Linux environment).
Detailed description(to see my actual questions, go to the end of the question)
In U-Boot, the partitions are defined by mtdparts
:
ANSWER
Answered 2019-Apr-08 at 09:28Thanks for the very well described problem and questions. It's a pleasure to help you in such conditions :)
There are a few things don't seem right, or which at least are not in the spirit of Bootlin's lab.
- You don't have the mtdparts settings in the kernel command line. As a consequence, you're working with the default partitions.
- You're flashing your UBI image into the 5th MTD partition (from the offset you're using) but are trying to attach UBI to the 6th partition. No surprise that you have UBI attach issues.
- When erasing and flashing the UBI images, you should use partition names instead of offsets. This will clarify things and reduce the risks of errors.
- You should group the dtb, kernel, rootfs and datafs partitions into a single MTD partition called "ubi", which you will use to flash the UBI image and then to attach UBI. So instead of MTD partitions, you will have 4 UBI volumes, as described by your ubinize configuration file.
This should definitely help. Don't hesitate to come back if you're still facing issues after doing this.
Happy hacking and learning
Michael (from Bootlin)
QUESTION
(I am really unsure of which tags to apply, so apologies in advance if I chose the wrong ones.)
I hope that this is not a too stupid question, but I'm really lost here.
A client lent me an Atmel SAMA5D2 Xplained board with Linux4SAM to play around with. I'm trying to interface the SPI interface on it, but I have no clue where to start.
To be clear, I've used similar boards (not this particular one) bare-metal. I've also used Linux for many years and wrote a few simple devices drivers some years ago. And still I'm lost.
dmesg | grep spi
gives me the following output:
ANSWER
Answered 2017-Feb-01 at 08:37@0andriy put me on the right track. I had to add a SPI resource to the Device Tree and flash the compile Device Tree Blob to the board. (Since I didn't know about Device Trees at all, this information is really hard to find...).
I now have a /dev/spidev32765.0
. I added this to the device tree:
QUESTION
I'm a beginner with programming AVR devices, in an attempt to move away from the inefficient _ms_delay() and _us_delay() blocking functions I've been trying program using the built in timers to control the timing of a basic LED flashing program with the CTC timer mode on a 16-bit timer. My goal is to make the LED flash at 2 Hz, on for 0.5s, off for 0.5s.
According to the ATMega328P datasheet, the freqency of a CTC output should be f_CTC = f_Clock/(2N(OCR1A+1), since my chip is a 328P Xplained mini, it's default CPU speed is 16 MHz, using the above formula, with N=64, the required OCR1A value to achieve my desired frequency should be 62499. With all of this in mind I wrote the following code:
...ANSWER
Answered 2018-Nov-05 at 06:53I noticed one thing that could cause the issues you are seeing.
You are using the line TIFR1 |= (1<
to clear the OCF1A bit. You are running that line very frequently, so there is a high chance that when OCF1A gets set, your code just clears it immediately before the if statement can see that it was set. You have no control over when that bit gets set; it can happen at any point in your loop.
You should only clear OCF1A after verifying that it is 1, like this:
QUESTION
I'm struggling with timer 1 configuration of the SAM4SD32C of the XPlained Pro Sam4s Board... I first used timer 0 and I could generate the waveform I needed.
So I copied past the code, adapted it for timer 1 to generate other waveform following the same technique. While debugging I noticed I couldn't get into my Interrupt routine. I inspected further and noticed that I couldn't write into Register RA and RC of timer 1 using tc_write_ra()
and tc_write_rc()
functions.
Here's part of my code, which I considered could help answering my problem. If more code is needed, then ask in comments.
...ANSWER
Answered 2018-Oct-24 at 08:30Well, I've kept going inspecting my code and I think I understood what the mistake is...
In TC0, there are 3 timers : ID_TC0 (channel 0), ID_TC1 (channel 1) and ID_TC2 (channel 2)
And in TC1, there are also 3 timers : ID_TC3 (channel 0), ID_TC4 (channel 1) and ID_TC5 (channel 2)
To activate a specific channel, you should activate the right clock peripheric, by using the function sysclk_enable_peripheral_clock(TIMER_DOOR_ID)
all the remaining functions called in the code above are working well after correction applied.
QUESTION
I'm working on a freeRTOS project and the SAM4S Xplained Pro.
In a task called every x ms, I would like to:
- initiate transmission of datas
- extract data from a reception buffer (if an end of frame has been detected)
I'm wandering if there is a way to wake up this task not only periodically, but also when an end of frame has been detected ? And when this task is woken up by this event, only extraction of data would be performed, not the data transmission.
Is the best way consists in creating two tasks ? One for emission, other for reception. I've not writen any code yet, I'm looking for some advices on how to deal with FreeRTOS and communication issues, as I'm a begginer in it...
...ANSWER
Answered 2018-Oct-21 at 17:02You can have the task block on a stream buffer or message buffer (https://www.freertos.org/RTOS-stream-message-buffers.html) and have the interrupt send data to the buffer to unblock the task. Set the read timeout to the period at which you want to transmit, that way the task will unblock when either it is time to transmit again or when data has arrived. You can use https://www.freertos.org/xTaskCheckForTimeOut.html to adjust the timeout to account for any time already spent in the Blocked state (i.e. if the task initially blocks for 100ms, but data arrives after 40ms which causes the task to unblock, then adjust the next block time to 60ms before blocking again to make up the whole 100ms).
QUESTION
I'm trying to use USART 0 on the SAM4SD16C processor. I got some help to start, from this website : SAM4S Xplained USART
Here's the code I'm using (which compiles):
...ANSWER
Answered 2018-Sep-28 at 07:18US_CSR_TXRDY
is a constant, so while(US_CSR_TXRDY != 0 )
is a infinite loop. I think it should be while( (USART0->US_CSR & US_CSR_TXRDY) != 0 )
.
QUESTION
When I call vTaskDelay, the delay lasts half of the supposed time. I have traced back the problem and I see that the Tick rate value is the double of what it should be as defined in configTICK_RATE_HZ. I checked this using the tick hook to toggle a led and measuring the frequency with an oscilloscope.
I am configuring the Atmel SAM L21 Xplained pro A board (ATSAML21J18A), with Atmel Studio 7 and FreeRTOS v8.0.1, based on the files of an ASF example called "FreeRTOS tickless demo using OLED1 Xplained".
My CPU clock runs at 12MHz from the SYSTEM_CLOCK_SOURCE_OSC16M. The configured tick rate is 100 Hz, from a timer clocked from GLCK_O(CPU clock). However, when I change the CPU clock rate at 4MHz instead 12 MHz, the Tick rate is correct, so I guess I'm missing some configuration somewhere for the timer which runs the OS tick.
Here are some values of OS tick rate I get with different CPU clock rates:
- CPU: 4 MHz - Tick rate: 100 Hz
- CPU: 8 MHz - Tick rate: 548 Hz
- CPU: 12 MHz - Tick rate: 218 Hz
- CPU: 16 MHz - Tick rate: 548 Hz
- CPU: 48 MHz - Tick rate: 2,25 kHz
Also, when I configure the OS tick timer clock source as the internal ultra low power oscilator ULPOSC32k running at 32kHz, the tick rate is correct, independently of the CPU clock frequency (100Hz).
Moreover, when I select tickless mode (1 or 2), even with the configuration that works well in tick mode, with the CPU at 4MHz and the tick interrupt generated from the Systick timer, I have the same problem, the dalay lasts half of what it should.
In FreeRTOSConfig I have:
...ANSWER
Answered 2017-Nov-17 at 11:11Changing the Timer instance from TC4 to TC2 solves the issue.
QUESTION
I want to make a interrupt driven uart program, to send large amounts of data at high speeds with the absolute minimal amount of cpu overhead. I combined existing code and reading of the datasheet to make this code. It compiles without errors or warnings in Atmel Studio 7 on an atmega328p (Atmega328p Xplained Mini).
The problem that I'm having is that data is erratic, sometimes it sends 'ello!' sometimes nothing for a while. The 'H' is often skipped, I don't understand this since the ISR shouldn't execute before the 'H' has been copied from UDR0 to be sent.
Any help would be greatly appreciated!
Greetings,
Bert.
...ANSWER
Answered 2018-May-15 at 13:54per the datasheet:
"When the Data Register Empty Interrupt Enable (UDRIE) bit in UCSRnB is written to '1', the USART data register empty interrupt will be executed as long as UDRE is set"
As soon as you enable the interrupt, the ISR is triggered, thus skipping the "H". You have a couple of options. 1) Enable the interrupt after you send the H. 2) Just use the ISR to send the entire message, including the H (e.g. don't send anything in the main routine. 3) Use the Tramsmit Complete ((TXC) interrupt. If you use this, send the H in the main routine, and once it is transferred, the ISR will trigger and your ISR will send the rest of the message.
Lastly, change "transmit_index < (len + 1)" to transmit_index <= len. There is no need to waste instructions inside an ISR
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