CLK | hating emulator of 8- and 16-bit platforms | Emulator library

I am learning how to control P10 Led matrix 64x32 with NodeModule MCU ESP8266, I google and found this library https://github.com/2dom/PxMatrix and this tutorial https://www.instructables.com/RGB-LED-Matrix-With-an-ESP8266/. I believed that I wire between P10 and ESP8266 in true way in the tutorial, but that P10 led does not display as the example:

The true result will be:

This is my wire diagram:

This is my code:

I am not able to go back to the LoginForm when i click the Cancel Button present in the SignUp.js..not sure how to do that if someone can help will be much appreciated.

App.js

Simple question (I think):

If you change the value in an input, the string result from XMLSerializer isn't showing the value

In my snippet, try entering a in the input, and then clicking serialize.

Why isn't it changing, and what can I do to get the updated HTML of the INPUT?

I have a design I've implemented using vhdl that is triggered based on a clock that sends an input signal to one of 8 output channels based on the sel input and also another 2 bit input. The elaborated design shows a lot of nesting due to the many if-else statements. So, I'm curious as to if there's a way to alleviate the nesting using case statements or some other method. I'm unfamiliar with doing this using case statements because I have two inputs that determine the output channel. The code that I currently have is displayed below.

i want to read bus in register_out and write to bus in register_in but i get type mismatch error on port4 of register_in

Register.hpp file

I am using EDA Playground with Aldec Riviera simulator, and I have this module here:

I am trying to build a Finite State Machine vending machine which consists of Datapath Unit and Control Unit. The attached links is the Control unit which consists the input of EQ(Equal), GT(Greater) and product. When product is "1" and either EQ or GT is "1", the output will be out=product. However, in my problem, the verilog code shows correct for GT but not EQ. It seem that the output cannot response to EQ when it is high.

My design of the state diagram. State Diagram

My Verilog code. Verilog code

The result. Result Waveform

I wanted to make sequence detector that will detect three consecutive ones. When the sequence is detected, digital circuit stops and waits for a reset signal to be active, so it would detect sequence again. I wrote the code but it has some problems. In xvlog file, I have following errors:

"syntax error near ;" (for lines 23,25,27,29,35,47,48)

and

"default case should appear only once" (for lines 23,25,27,29,35,48,49).

Here is the code:

basically i declared a typedef enum in a package (in a file called Definition.sv):