ivt | programable Scientific RPN Calculator

 by   zooxo C++ Version: Current License: Non-SPDX

kandi X-RAY | ivt Summary

kandi X-RAY | ivt Summary

ivt is a C++ library. ivt has no bugs, it has no vulnerabilities and it has low support. However ivt has a Non-SPDX License. You can download it from GitHub.

See a short video of IVEE at: IVT (IVEE-TINY) is the smallest member of the IV-calculator series (FORTH-like programable calculators). The name Ivee or IV stands for the roman number 4, which was the basis for naming FORTH (4th generation programming language).
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              ivt has a low active ecosystem.
              It has 5 star(s) with 1 fork(s). There are 2 watchers for this library.
              OutlinedDot
              It had no major release in the last 6 months.
              There are 1 open issues and 0 have been closed. There are no pull requests.
              It has a neutral sentiment in the developer community.
              The latest version of ivt is current.

            kandi-Quality Quality

              ivt has no bugs reported.

            kandi-Security Security

              ivt has no vulnerabilities reported, and its dependent libraries have no vulnerabilities reported.

            kandi-License License

              ivt has a Non-SPDX License.
              Non-SPDX licenses can be open source with a non SPDX compliant license, or non open source licenses, and you need to review them closely before use.

            kandi-Reuse Reuse

              ivt releases are not available. You will need to build from source code and install.
              Installation instructions are not available. Examples and code snippets are available.

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            ivt Key Features

            No Key Features are available at this moment for ivt.

            ivt Examples and Code Snippets

            No Code Snippets are available at this moment for ivt.

            Community Discussions

            QUESTION

            How will first megabyte memory layout be changed in Protected Mode?
            Asked 2021-Apr-12 at 22:03

            As far as I understand when we are in x86 Real Mode the first megabyte memory layot looks like that:

            Will memory layot be changed once we jump to Protected Mode? I know that we can access video memory by the same address like we did it the Real Mode but what about other regions? Can we overwrite them? I suppose we don't need the IVT and the boot sector anymore. But I'm not sure about others.

            ...

            ANSWER

            Answered 2021-Apr-12 at 22:03

            Short answer: No.

            Long answer: The layout of memory does not change depending on what mode you are in. However, when not in real mode, most of the memory in that region is irrelevant to you, and can be used. However, you must know that a LOT of memory in that region may be IO-mapped, and thus, it is a good idea to load your kernel >1M (2M is the optimal place) and to ignore the first 1M of memory.

            Once you implement paging and page allocation, you will want to reserve the first megabyte of memory, thus not allowing it to be allocated.

            Source https://stackoverflow.com/questions/66577585

            QUESTION

            Unable to set a Custom Toast on Custom ListView Adapter
            Asked 2021-Mar-15 at 11:35

            I made the xml for custom toast, everything worked fine when i had hardcoded the text and image in custom toast, but while changing both of them according to the list item, I get "Attempt to invoke virtual method 'void android.widget.TextView.setText(java.lang.CharSequence)' on a null object reference"

            CUSTOM ADAPTER -

            ...

            ANSWER

            Answered 2021-Mar-15 at 11:35

            QUESTION

            Why arm-poky-linux-gnueabi-ar says "invalid option -- 'g'" whereas this option doesn't appear in the args list of the command line?
            Asked 2021-Feb-22 at 23:23

            I am using bitbake building command "bitbake -v update-engine-titan-c" and here are the logs :

            ...

            ANSWER

            Answered 2021-Feb-22 at 23:23

            It seems like ar doesn't take -lgio-2.0 arguments. I think you're supposed to put the path to the libgio-2.0.so file directly on the command line, not via a -l argument.

            (In the ar manpage it says the -l argument is accepted but ignored, so I suspect G.M. is correct in the comment in saying that -lgio-2.0 is where the -g comes from)

            Source https://stackoverflow.com/questions/66315160

            QUESTION

            How to reset IVT in asm ? without relaunch the computer
            Asked 2021-Feb-02 at 19:47

            I am creating an operating system in c and asm, I have a problem with my IVT I am thinking it's corrupt. So I want to reinitialize IVT without relaunch the computer I don't really know if it's possible because I found nothing on google. Thank you for your answers

            ...

            ANSWER

            Answered 2021-Feb-02 at 19:47

            For the obsolete BIOS there's no way to do it without some kind of reset (which could be a "warm reset" rather than a "cold reset", which is faster but still prevents your code from continuing).

            For alternatives; you can:

            a) create a copy of the old IVT yourself (e.g. early during boot when you know it's still good) and restore it from the copy. This could also be used for detecting if/when/where the IVT became corrupted (e.g. compare the IVT to your copy at various places in your code, so that you can figure out something like "it was good before I called foo() but corrupted after foo() returned, and the corruption was at address 0x00123".

            b) calculate a checksum of the IVT and use that to determine if/when the IVT was modified (without being able to restore the IVT).

            c) if you know a specific part of the IVT is being corrupted; set up the CPU's debug registers to generate a trap exception when that part of the IVT is modified. This is more complicated (you'd have to hook/replace the interrupt handler for "interrupt 0x01").

            d) Use an emulator with a debugger (Bochs, Qemu, VirtualBox) that allows you to single-step and inspect memory, and/or set breakpoints (including "break when data at address .... is modified"), to find out if/when the IVT is being corrupted.

            e) Find the problem using "desk checking" (reading and analyzing the source code looking for bugs that can explain the symptoms). This is probably the best way because you might find other bugs too; and because there shouldn't be much code to check anyway (typically it's a few KiB in a boot loader that's executed before the OS takes control of the hardware, reconfigures the hardware so the BIOS can't work anyway, then starts treating the memory that contained the IVT as "free RAM" that is recycled/allocated for any other purpose).

            Source https://stackoverflow.com/questions/66014881

            QUESTION

            Change IRQ8 ISR
            Asked 2020-Aug-09 at 19:04

            I want to print "Hello." every 55ns. what am I doing wrong?

            ...

            ANSWER

            Answered 2020-Aug-09 at 19:04

            I want to print "Hello." every 55ns

            I believe you meant 55 milliseconds (ms) and not nanoseconds (ns).

            You don't need to hook any interrupt handler for this objective. All it takes is monitoring the BIOS.TimerTick and print the message as soon as the tick changes. That's what next program does. The executable will be a .COM program that starts up with CS==DS==ES==SS. The ORG 256 directive is mandatory.

            Source https://stackoverflow.com/questions/63326738

            QUESTION

            Confused about X86 segmentation
            Asked 2020-Feb-09 at 22:09

            I am writing a boot sector to load my 16-bit real mode DOS clone, and I'm stuck on something which might be completely obvious, but I've spent hours of time trying to understand why it won't work.

            Basically, I'm trying to set DS, CS, SS to zero, but keep ES set directly past 7C00 to load the system.

            But when running my code through a debugger, it says that nothing was ever read into memory, i.e.: root, FATs, etc (???)

            Basically, I'm trying to compare DS:SI (0000:7C00+FILE) TO ES:DI (07E0:0000), but to no avail. I heard someone tell me that it actually checks DS:SI with DS:DI and so I tried it, but that didn't work either. Shouldn't 07E0:0000 be directly after 0000:7C00? Does cmpsb require ES & DS to be the same?

            I've looked in the Intel manuals, but it says that cmpsb compares DS:SI to ES:DI, but I don't think I'm misunderstanding too much. 07E0:0000 is 0x7E00, no?

            Anyway, thanks for any help. I appreciate it.

            EDIT: I forgot to mention that if I zero ES and put the load address into BX, everything works. But when it's flipped, ES=07E0, BX=0, nothing works or is even read. No idea why, since ES:BX should be the same thing regardless of which route you take.

            My code:

            ...

            ANSWER

            Answered 2020-Feb-08 at 14:34
            Check your sizes!

            On the one hand you define:

            Source https://stackoverflow.com/questions/60108641

            QUESTION

            How to implement SVC handler on ARM926EJ-S?
            Asked 2020-Jan-04 at 01:41

            I'm writing an amateur operating system for ARM-based devices and currently trying to make it working in QEMU's versatilepb (ARM926EJ-S).

            The problem arrives when I try to implement syscalls to my kernel. The idea is pretty simple: to implement system calls via SVC (SWI) instruction. So applications work in user mode, and to call a kernel function, they do SVC instruction, so ARM processor switches to supervisor mode and calls the appropriate SVC handler.

            But the problem is that when I call __asm__("SVC #0x08");, the device just resets and calls RESET_HANDLER, so it looks like the emulator just reboots.

            I spent a few hours already to figure out what is the problem, but still got no idea.

            Here is the code of ivt.s (the initial code with handlers):

            ...

            ANSWER

            Answered 2020-Jan-03 at 23:32

            Many thanks to @Jester and @old_timer, the problem is solved.

            The problem was not with code, but with linker script. I have put my vector table at 0x10000, as you can see in the linker script, but it should be placed at 0x0. So SVC was not handled properly because the handler was placed in a wrong place.

            When I changed the base address in my ld script and tried to load the firmware as ELF, everything starts to work perfectly.

            Source https://stackoverflow.com/questions/59582630

            QUESTION

            integrate attribute of xarray
            Asked 2019-Nov-19 at 00:07

            I am new to xarray and need it to handle larger netcdf files. I have one with dimensions 'time','level','latitude', and 'longitude'. I try to integrate along the 'level' dimension below and get an error that a 'DataArray' object has no attribute 'integrate'. From this page I understand that it does. Very simple code below. Thanks for any help.

            ...

            ANSWER

            Answered 2019-Nov-19 at 00:07

            The integrate method was added in Xarray v0.12. Upgrading to (at least) that version should fix your problem.

            Source https://stackoverflow.com/questions/58905249

            QUESTION

            Are IVT and BDA physical memory addresses and sizes set always the same during boot sequence?
            Asked 2019-Aug-22 at 04:14

            During boot sequence, IVT(Interrupt Vector Table) and BDA(BIOS Data Area) are loaded to memory, IVT starting address at 0x00000000 and BDA starting address at 0x00000400 respectively.

            ...

            ANSWER

            Answered 2019-Aug-22 at 04:14

            Q1. Is IVT start address always set to 0x00000000?

            Only for 80x86 systems that support BIOS and booted using BIOS.

            Q2. Is IVT size always 1024 bytes? Q3. Is BDA start address always set to 0x00000400?

            There isn't any "hard barrier" between these things. The IVT itself is 1 KiB, but various entries (especially near the end) are used for BIOS data, so it's more like the IVT and BDA are intertwined and overlapping.

            Q4. Is BDA size always 256 bytes?

            For compatibility with ancient DOS stuff the BDA "should" end before 0x00000500. There's no guarantee that the BIOS cared about compatibility with ancient DOS stuff though.

            A better (more cautious/conservative) idea is to just ignore the first 4 KiB of RAM until the operating system's boot code no longer needs BIOS anymore, and then treat it like free usable RAM (unlike EBDA, there's no reason for an OS to preserve the data in the BDA).

            Note: Even while boot code still needs BIOS there no reason for the boot code to read anything in the BDA itself (it only needs to avoid trashing the data so BIOS can read it). For example, rather than looking at 0x040E you can just use int 0x12 (or int 0x15, eax=0xE820). The only other things I've seen people use BDA for is to determine floppy drive types and number of serial ports (which are things from BIOS settings that are likely to be set wrong by the user, and therefore unreliable and useless).

            Source https://stackoverflow.com/questions/57601076

            QUESTION

            How to detect or probe or scan usable/accessible physical memory?
            Asked 2019-Jul-29 at 06:12

            How to exhaustively detect or probe or scan usable/accessible physical memory?

            I'm currently making a custom bootloader in NASM for a x86_64 custom operating system.

            In order to assign which physical address to contain which data, I want to make sure that the memory is guaranteed free for use. I've already tried BIOS interrupt int 0x15 eax 0xE820 and checked out device manager memory resources. The problem is that none of them covers fully.

            For example, it says 0x0000000000000000 ~ 0x000000000009FC00 is usable. But strictly speaking, 0x0000000000000000 ~ 0x0000000000000500 is not usable because it stores IVT and BDA.

            Also, there are PCI holes here and there.

            My objective here is detecting or probing or scanning entire memory available in my hardware and make a memory map so that I can distinguish which address is which. (Example map below)

            ...

            ANSWER

            Answered 2019-Jul-29 at 06:12

            How much information do you want?

            If you only want to know which areas are usable RAM; then "int 0x15, eax=0xE820" (with the restriction that the BDA will be considered usable), or UEFI's "get memory map" function, are all you need. Note that for both cases one/some areas may be reported as "ACPI reclaimable", which means that after you've finished parsing ACPI tables (or if you don't care about ACPT tables) the RAM will become usable.

            If you want more information you need to do more work, because the information is scattered everywhere. Specifically:

            • ACPI's SRAT table describes which things (e.g. which areas of memory) are in which NUMA domain; and ACPI's SLIT table describes the performance implications of that.

            • ACPI's SRAT table also describes which things (e.g. which areas of memory) are "hot plug removable" and reserved for "hot insert".

            • the CPU's CPUID instruction will tell you "physical address size in bits". This is useful to know if/when you're trying to find a suitable area of the physical address space to use for a memory mapped PCI device's BARs, because the memory maps you get are too silly to tell you the difference between "not usable by memory mapped PCI devices", "usable by memory mapped PCI devices" and "used by memory mapped PCI devices".

            • parsing (or configuring) PCI configuration space (in conjunction with IOMMUs if necessary) tells you which areas of the physical address space are currently used by which PCI devices

            • parsing "System Management BIOS" tables can (with a lot of work and "heuristical fumbling") tell you which areas of the physical address space correspond to which RAM chips on the motherboard and what the details of those RAM chips are (type, speed, etc).

            • various ACPI tables (e.g. MADT/APIC and HPET) can be used to determine the location of various special devices (local APICs, IO APICs, HPET).

            • you can assume that (part of) the area ending at physical address 0xFFFFFFFF will be the firmware's ROM; and (with some more "heuristical fumbling" to subtract any special devices from the area reported as "reserved" by the firmware's memory map) you can determine the size of this area.

            If you do all of this you'll have a reasonably complete map describing everything in the physical address space.

            Source https://stackoverflow.com/questions/57246972

            Community Discussions, Code Snippets contain sources that include Stack Exchange Network

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            You can download it from GitHub.

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