MCPU | MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD
kandi X-RAY | MCPU Summary
kandi X-RAY | MCPU Summary
MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation. This is an old project from 2001. Since it still seems to be of interest to many, I migrated it to Github for easier maintenance. Please refer to the original project description (pdf) for further information.
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QUESTION
I am using GCC to compile a program for an Atmel Cortex M4 SAM4S Processor. I need to link the standard libraries libgcc.a and libc.a, and to do so I am currently using the following makefile commands
...ANSWER
Answered 2021-May-08 at 11:04It seems everything works by using gcc instead of ld for linking. gcc then calls the linker with all the correct options, including all the standard librarier automatically.
The code shown in the question can be replaced by
QUESTION
I am trying to optimize a CUDA code with LLVM passes on a PowerPC system (RHEL 7.6 with no root access) equipped with V100 GPUs, CUDA 10.1, and LLVM 11 (built from source). Also, I tested clang, lli, and opt on a simple C++ code, and everything works just fine.
After days of searching, reading, and trials-and-errors, I managed to compile a simple CUDA source. The code is the famous axpy:
...ANSWER
Answered 2021-Apr-17 at 16:29The problem was not related to PowerPC architecture. I needed to pass the fatbin
file to the host-side compilation command with -Xclang -fcuda-include-gpubinary -Xclang axpy.fatbin
to replicate the whole compilation behavior.
Here is the corrected Makefile:
QUESTION
I'm using the latest available version of ARM-packaged GCC:
arm-none-eabi-gcc (GNU Arm Embedded Toolchain 10-2020-q4-major) 10.2.1 20201103 (release) Copyright (C) 2020 Free Software Foundation, Inc.
When I compile this code using "-mcpu=cortex-m0 -mthumb -Ofast":
...ANSWER
Answered 2021-Mar-22 at 21:23The compiler can only rearrange integer expressions if it knows that the result will be correct for any input allowed by the language.
Because 7 is co-prime to 2, it is impossible to carry out dividing any input by seven with multiplying and shifting.
If you know that it is possible for the input that you intend to provide, then you have to do it yourself using the multiply and shift operators.
Depending on the size of the input, you will have to choose how much to shift so that the output is correct (or at least good enough for your application) and so that the intermediate doesn't overflow. The compiler has no way of knowing what is accurate enough for your application, or what your maximum input will be. If it allows any input up to the maximum of the type, then every multiplication will overflow.
In general GCC will only carry out division using shifting if the divisor is not co-prime to 2, that is if it is a power of two.
QUESTION
The microcontroller is an STM32 F767ZI, which contains a 32 bit ARM Cortex M7
When setting values to the registers, the registers all appear to be offset by 1.
For example, the following code:
core.S
...ANSWER
Answered 2021-Mar-23 at 18:53Well, having seen the majority of comments suggesting that it is likely an issue with the GDB server, I decided to give another GDB server a go.
The outcome was very pleasing:
For:
core.S
QUESTION
I'm building code for PowerPC with hard float and suddenly getting this issue.
I understand that this symbol belongs to gcc's soft-float library. What I don't understand is why it's trying to use that at all, despite my efforts to tell it to use hard float.
make flags:
...ANSWER
Answered 2021-Mar-22 at 00:08Looking at the GCC docs, __floatundisf
converts an unsigned long to a float. If we compile your code* with -O1 and run objdump
, we can see that the __floatundisf
indeed comes from dividing your u64 by a float:
QUESTION
let me start by saying that this is my first time really meddling with GCC, so I apologize if this question is not very constructive or has been answered before.
I have two static libraries:
"L1.h"
...ANSWER
Answered 2021-Mar-17 at 22:25My first question is, does the order matter here?
Yes, literally from gcc documentation:
-l library
...
It makes a difference where in the command you write this option; the linker searches and processes libraries and object files in the order they are specified. Thus, ‘foo.o -lz bar.o’ searches library ‘z’ after file foo.o but before bar.o. If bar.o refers to functions in ‘z’, those functions may not be loaded.
how to tell the linker(?) that there is a strong definition of the function in another static library, or something along those lines?
Typically in modern embedded:
QUESTION
I have the following function from a well known benchmark that I am compiling with gcc-arm-none-eabi-10-2020-q4-major
:
ANSWER
Answered 2021-Mar-08 at 22:18The clue is in the compiler options you already posted:
-mfpu=fpv5-sp-d16
"sp" means single precision.
You told it not to generate hardware double instructions, which is correct for most Cortex-M7 processors because they can't execute them. If you have an M7 which can then you need to set the correct fpu argument.
QUESTION
I'm getting an issue with my embedded c project.
I'm trying to link libcrc to my project, but I'm getting an undefined reference error.
I tried boiling the problem down to its simplest form and this is what I have:
...ANSWER
Answered 2021-Mar-06 at 09:07From the comment that it works for gcc
but it's not working for arm-gcc
, it looks like you are using a cross-compiler and you are picking up the libraries for the host architecture instead of the libraries for the target architecture.
When you are using a crosscospiler, you need to make sure that your toolchain environment is properly set, otherwise you will have lot's of problems with the build. Also you need to assure that the libraries which are available your build environment are build for the target architecture. If not, the linker will find the library specified with -L
, but inside the library there will be no symbols for your target architecture, so you will get error that the symbols you are using form that library are missing.
QUESTION
My setup is:
- MPLAB X IDE v3.40
- C30 compiler v3.31
- PIC24FJ128GA306
Mi problem comes when I try to use printf. I can print a string but not a variable.
This line is correctly bompiled:
...ANSWER
Answered 2021-Feb-04 at 12:17I have the solution. The problem was that my project had the legacy libraries actives... Uncheking that option in the project configuration it is running correctly now.
QUESTION
I'm trying to write a bare metal blink program for a Nucleo-64 Stm32F401re board using C. However while starting debugging for errors (it didn't blink yet) I found an odd adress for which I found no explanation. This is the output of the relevant part of the disassembly:
...ANSWER
Answered 2021-Jan-25 at 14:28From the Programming Manual PM0214 of STM32F4:
Vector table
The vector table contains the reset value of the stack pointer, and the start addresses, also called exception vectors, for all exception handlers. Figure 11 on page 39 shows the order of the exception vectors in the vector table. The least-significant bit of each vector must be 1, indicating that the exception handler is Thumb code.
So, the LSb = 1 indicates that the instruction pointed by that vector is a Thumb instruction. Cortex-M cores support only Thumb instruction set. The compiler knows that, and makes LSb = 1 automatically. If you somehow manage to make it 0, it won't work.
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