avr | Jeremy Cole 's AVR Projects

Well at the first look, there is no special problem in your code. So let's check the possibilities:

First you have done some 32-bit long calculations and put the result in the 16-bit register:

TCNT1 = ( ( 4194304 - delayMS ) * 1000 ) / 64; it results in an unpredictable value that has been entered in the register. so I recommend you to use appropriate values or using (long) and (int) to your code to prevent data overflow.

Second You have not entered the correct data line order:

The compiler error says:

the trait bound &mut T: avr_hal_generic::embedded_hal::adc::Channel is not satisfied

Notice that the error is asking for &mut T to implement Channel, &mut T: Channel<...>, whereas your T has the bound T: Channel<...> — applying to T itself rather than &mut T. That's why the bound you've already written isn't helping.

Now, what's the right fix? If I look at the docs you linked, I can find the type of ::read. (Note: I copied the text from the docs to construct this snippet; I didn't read the source code.)

Cannot open source file avr/io.h (dependency of hal.h)

You appear to be using ChibiOS whhich has a file hal.h which includes halconf.h which includes mcuconf.h. Clearly you appear to have an AVR port of ChibiOS where you need STM32 or ARM Cortex-M support.

But, how VS Code can find dependencies before compiling?

The same way as the compiler/pre-processor do, by having include paths configured, parsing the project files and accounting for any externally defined (command line) macros.

I also was wondering if I should add a path for main.cpp file and other C and CPP files in the configuration file of VS Code to solve these problems?

I believe it will parse project files in any case. It only needs to find the header files included in a source file to provide context for the parsing of the sourcefile.

For debugging, I don't see any debugger in the list, though I installed openOCD and add the path in the environment variable

That is an entirely different question - post a new question for that.

I question the following assumption:

This didn't work. It is clear that the compiler is optimising-out much of the code related to z completely! The code then fails to function properly (running far too fast), and the size of the compiled binary drops to about 50% or so.

Looking at https://gcc.godbolt.org/z/sKdz3h8oP, it seems like the loops are actually being performed, however, for whatever reason each z++, when using a global volatile z goes from:

Sketch.cpp is compiled as as C++, including test.h. In order to support function overloading, class membership etc, C++ uses name mangling to encode these C++ features in the symbol name. As such the symbol name for some_test in Sketch.cpp is not the same as that in test.c which is compiled as C and no name mabgling is applied..

The solution is to prevent name mangling for this symbol when the header is C++ compiled by specifying that the symbol has C linkage:

Your bug is that you are trying to make a function named graph() remove the parenthesis then all will be fine.

The STM32 chips are all cortex-m based (a core they purchase from ARM). And so far they all support the cortex-m0 instruction set (armv6-m). You can follow the ST documentation to see what cortex-m core it has to the technical reference manual at arms website infocenter.arm.com and in there it says which architecture (armv6-m armv7-m armv8-m...) and in there you find out about the instruction set and the architecture. You should not start this journey without the minimum documents. The ARM TRM and ARM ARM for the core and architecture. and the REFERENCE manual from ST (not the programmers manual from either them) and the datasheet from ST.

The cortex-ms boot off of a vector table, described in the architectural reference manual (ARM). The first word is loaded into the stack pointer the second is the reset vector and it is defined as requiring the lsbit to be a 1 (indicating this is a thumb function address). And you can read about the rest. To make a minimal example that is good enough.

All of the STM32 chips I have worked with (I have worked with a ton of them) support a user flash based at 0x08000000 and SRAM at 0x20000000, some of the newer firmware that comes with nucleo boards will insist on the proper 0x08000000 address in the vector table (some small percentage also support a faster memory address at 0x00200000). The ARM documentation will say 0x00000000 basically or indicate a VTOR thing but in reality it is generally 0x00000000 as the address that the logic looks for to find the vector table on reset. Various ways to skin this cat but ST chooses to mirror a percentage of the flash to 0x00000000.

So a very simple example to get you started.

Bootstrap, flash.s

Three points work together against your implementation:

• Quicksort has a worst case complexity of O(n^2)
• Picking the leftmost element as pivot gives worst case behavior on already sorted arrays (https://en.wikipedia.org/wiki/Quicksort#Choice_of_pivot):

In the very early versions of quicksort, the leftmost element of the partition would often be chosen as the pivot element. Unfortunately, this causes worst-case behavior on already sorted arrays

• Your algorithm sorts the arrays in place, meaning that after the first pass the "random" array is sorted. (To calculate average times JMH does several passes over the data).

To fix this, you could change your benchmark methods. For example, you could change sortArray01000() to

Don't try to use setjmp()/longjmp() to re-enter a main-level function from an ISR. This calls for disaster, because the ISR is never finished correctly. You might like to use assembly to work around, but this is really fragile. I'm not sure that this works at all on AVRs.

Since your baudrate is 38400, one byte needs at least some 250µs to transfer. Assumed that your message has a minimum of 4 bytes, the time to transfer a message is at least 1ms.

There are multiple possible solutions; your question might be closed because they are opinion-based...

However, here are some ideas:

Since a message can arrive only once per millisecond or less, your application don't need to be much faster than that.

Divide your main tasks into separated steps, each running faster than 1 ms. You might like to use a state machine, for example to allow slower I/O to finish.

After each step, check for a completed message. Using a loop avoids code duplication.

Use a timer interrupt to do the repeated work. Divide it in short tasks, a state machine does magic here, too.

Use an otherwise unused interrupt to signal the end of the message. Its ISR may run a bit longer, because it will not be called often. This ISR can handle the message and change the state of the application.

You need to think about interrupt priorities with much care.

The endless loop in main() will effectively be empty, like for (;;) {}.