confy | Re-usable configurations for web apps | Frontend Framework library

As a "professional assembly programmer", you would be remiss to use the obscure 3-operand forms that can move a value from one register to another instead of the easy to read move pseudo instruction, same with using the obscure 3-operand forms to move an immediate into a register instead of the easy to read li pseudo instruction.

The main reason to avoid pseudo instructions is if your instructor says you can't use them.

However, in using them, we should understand them, and that they can result in unexpected inefficiencies.  Many pseudo instructions (but not all) expand into 2 or 3 real hardware instructions.  Using them hides opportunities for optimization.

For one example, branches comparing register to immediate (not supported directly by hardware) have an expansion that requires loading an immediate value into a register so as to use the register to register comparisons.  If you are aware of that, then doing this in a loop, we might instead load the immediate into a register outside/before the loop to save that instruction & its cycles inside the loop.

Further, in general, MIPS assemblers support pseudo instructions expanded and interconnected using a CPU register $at.  Thus, assembly programmers are admonished not to use this register; calling conventions describe $at as "reserved for the assembler".  However, CPU registers are valuable resources, and this dedicated reservation is a waste.  (Note that compilers are not bound to this reservation, and can freely use $at as a scratch register [call clobbered].)

RISC V and its assemblers have eliminated this "assembler reservation" register (giving it back to the programmers) and only supports pseudo instructions that can be done without an assembler-dedicated register.  While the various lw $regtrg, label($regsrc) forms (ugly as they are) are still supported, the similar sw forms are not because those would require an additional register!  RISC V has also removed the two $k registers (reserved for operating system), giving those back to user mode code, and, also extended the calling convention to pass more parameters in registers.  These changes make RISC V use the scarce resources (CPU registers) quite a bit more efficiently.