Epyc | A versatile software for modeling epidemics on networks

In your case, the 256 tasks have no constraints to run in the same rack, location or not. Slurm have no clues to schedule correctly the job on your cluster. It could be schedule 1 task on 256 different nodes, and that is not efficient at all.

To be sure that all is schedule correctly, perhaps you should force to locate the tasks on the node.

Native memory allocation (mmap) failed to map 31138512896 bytes - which is about 31,14G, well above your limit of 29G.

TL;DR: Do not use KMP_AFFINITY. It is not portable. Prefer OMP_PROC_BIND (it cannot be used with KMP_AFFINITY at the same time). You can mix it with OMP_PLACES to bind threads to cores manually. Moreover, numactl should be used to control the memory channel binding or more generally NUMA effects.

Long answer:

Thread binding: OMP_PLACES can be used to bound each thread to a specific core (reducing context switches and NUMA issues). OMP_PROC_BIND and KMP_AFFINITY should theoretically do that correctly, but in practice, they fail to do so on some systems. Note that OMP_PROC_BIND and KMP_AFFINITY are exclusive option: they should not be used together (OMP_PROC_BIND is a new portable replacement of the older KMP_AFFINITY environment variable). As the topology of the core change from one machine to another, you can use the hwloc tool to get the list of the PU ids required by OMP_PLACES. More especially hwloc-calc to get the list and hwloc-ls to check the CPU topology. All threads should be bound separately so that no move is possible. You can check the binding of the threads with hwloc-ps.

NUMA effects: AMD processors are built by assembling multiple CCX connected together with a high-bandwidth connection (AMD Infinity Fabric). Because of that, AMD processors are NUMA systems. If not taken into account, NUMA effects can result in a significant drop in performance. The numactl tool is designed to control/mitigate NUMA effects: processes can be bound to memory channels using the --membind option and the memory allocation policy can be set to --interleave (or --localalloc if the process is NUMA-aware). Ideally, processes/threads should only work on data allocated and first-touched on they local memory channels. If you want to test a configuration on a given CCX you can play with --physcpubind and --cpunodebind.

My guess is that the Intel/Clang runtime does not perform a good thread binding when KMP_AFFINITY=scatter is set because of a bad PU mapping (which could come from a OS bug, a runtime bug or bad user/admin settings). Probably due to the CCX (since mainstream processors containing multiple NUMA nodes were quite rare).
On AMD processors, threads accessing memory of another CCX usually pay an additional significant cost due to data moving through the (quite-slow) Infinity Fabric interconnect and possibly due to its saturation as well as the one of memory channels. I advise you to not trust OpenMP runtime's automatic thread binding (use OMP_PROC_BIND=TRUE), to rather perform the thread/memory bindings manually and then to report bugs if needed.

Here is an example of a resulting command line so as to run your application: numactl --localalloc OMP_PROC_BIND=TRUE OMP_PLACES="{0},{1},{2},{3},{4},{5},{6},{7}" ./app

PS: be careful about PU/core IDs and logical/physical IDs.

• shared_buffers: start with 25% of the available RAM or 8GB, whatever is lower.

  You can run performance tests to see if other settings work better in your case.

• max_connections: leave the default 100. If you think that you need more than 50 connections, use the connection pooler pgBouncer.

• random_page_cost: if your storage is as fast with random I/O as with sequential I/O, use a setting of 1.1. Otherwise, stick with the default 4.

I am able to run this without any error by modifying your code for

1. include headers
2. removed unused variables
3. add check if the returned value is NULL or not for alloc

Test on:

AMD lacks support for DDIO.

For this reason AMD is not vulnerable to NetCAT: https://www.techpowerup.com/259096/new-netcat-vulnerability-exploits-ddio-on-intel-xeon-processors-to-steal-data

Yes, the same as in Intel's CPUs.
You use cpuid (CPUID_Fn00000001_ECX) to check for it

and the Core::X86::Msr::APIC_BAR MSR to enable it:

Just like you would with Intel's CPUs.

The x2APIC specification is here.

Having fully featured language like Python and so well structured data I wouldn't try to parse everything using regular expressions. Instead I'd just wrote a code doing the job, using regex only at the very end. This way instead of enormous regex, I have short and easy to read code with very simple regular expressions.

I found a program located at http://notabs.org/fpuaccuracy/ (direct download link; GPLv3) designed to test the accuracy of x87 trigonometric instructions. The reference output for fpuaccuracy examples supplied with the program, generated using an Intel Core i7-2600 (Sandy Bridge), is as follows: