checkCudaErrors | CUDA Error Checking Function : Do you want to check | GPU library

 by   visualJames C++ Version: Current License: No License

kandi X-RAY | checkCudaErrors Summary

kandi X-RAY | checkCudaErrors Summary

checkCudaErrors is a C++ library typically used in Hardware, GPU applications. checkCudaErrors has no bugs, it has no vulnerabilities and it has low support. You can download it from GitHub.

CUDA Error Checking Function: Do you want to check for errors using the CUDA Driver API? Here is a header for checking errors in CUDA Driver Api. The function checkCudaErrors checks the result of CUresult and returns it value.
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              checkCudaErrors has a low active ecosystem.
              It has 2 star(s) with 0 fork(s). There are 1 watchers for this library.
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              It had no major release in the last 6 months.
              checkCudaErrors has no issues reported. There are no pull requests.
              It has a neutral sentiment in the developer community.
              The latest version of checkCudaErrors is current.

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              checkCudaErrors has 0 bugs and 0 code smells.

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              checkCudaErrors has no vulnerabilities reported, and its dependent libraries have no vulnerabilities reported.
              checkCudaErrors code analysis shows 0 unresolved vulnerabilities.
              There are 0 security hotspots that need review.

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              checkCudaErrors does not have a standard license declared.
              Check the repository for any license declaration and review the terms closely.
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            Community Discussions

            QUESTION

            cuda-memcheck error in cusolverDnCgesvdjBatched function using CUDA
            Asked 2021-Mar-22 at 15:52

            I am using cusolverDnCgesvdjBatched function to calculate singular value decomposition (SVD) of multiple matrices, I use cuda-memcheck to check any memory issues, I am getting an error like this in the cusolverDnCgesvdjBatched function.

            ...

            ANSWER

            Answered 2021-Mar-22 at 15:52

            Referring to the documentation, for the info parameter:

            info device output an integer array of dimension batchSize

            So this is expected to be an array of integers of size equal to the number of matrices in the batch. This makes sense because we expect one of these info reports for each matrix. But your allocation does not do that:

            Source https://stackoverflow.com/questions/66740359

            QUESTION

            Equivalent of cudaSetDevice in OpenCL?
            Asked 2021-Feb-25 at 15:03

            I have a function that I wrote for 1 gpu, and it runs for 10 seconds with one set of args, and I have a very long list of args to go through. I would like to use both my AMD gpus, so I have some wrapper code that launches 2 threads, and runs my function on thread 0 with an argument gpu_idx 0 and on thread 1 with an argument gpu_idx 1.

            I have a cuda version for another machine, and I just run checkCudaErrors(cudaSetDevice((unsigned int)device_id)); to get my desired behavior.

            With openCL I have tried to do the following:

            ...

            ANSWER

            Answered 2021-Feb-25 at 15:03

            Whoops! Instead of saving device_id into a static variable I started returning from the above code and using it as a local variable, and everything works as expected, and is now thread safe.

            Source https://stackoverflow.com/questions/66310107

            QUESTION

            Processing Shared Work Queue Using CUDA Atomic Operations and Grid Synchronization
            Asked 2020-Dec-08 at 19:59

            I’m trying to write a kernel whose threads iteratively process items in a work queue. My understanding is that I should be able to do this by using atomic operations to manipulate the work queue (i.e., grab work items from the queue and insert new work items into the queue), and using grid synchronization via cooperative groups to ensure all threads are at the same iteration (I ensure the number of thread blocks doesn’t exceed the device capacity for the kernel). However, sometimes I observe that work items are skipped or processed multiple times during an iteration.

            The following code is a working example to show this. In this example, an array with the size of input_len is created, which holds work items 0 to input_len - 1. The processWorkItems kernel processes these items for max_iter iterations. Each work item can put itself and its previous and next work items in the work queue, but marked array is used to ensure that during an iteration, each work item is added to the work queue at most once. What should happen in the end is that the sum of values in histogram be equal to input_len * max_iter, and no value in histogram be greater than 1. But I observe that occasionally both of these criteria are violated in the output, which implies that I’m not getting atomic operations and/or proper synchronization. I would appreciate it if someone could point out the flaws in my reasoning and/or implementation. My OS is Ubuntu 18.04, CUDA version is 10.1, and I’ve run experiments on P100, V100, and RTX 2080 Ti GPUs, and observed similar behavior.

            The command I use for compiling for RTX 2080 Ti:

            nvcc -O3 -o atomicsync atomicsync.cu --gpu-architecture=compute_75 -rdc=true

            Some inputs and outputs of runs on RTX 2080 Ti:

            ...

            ANSWER

            Answered 2020-Dec-08 at 19:59

            You may wish to read how to do a cooperative grid kernel launch in the programming gude or study any of the cuda sample codes (e.g. reductionMultiBlockCG, and there are others) that use a grid sync.

            You're doing it incorrectly. You cannot launch a cooperative grid with ordinary <<<...>>> launch syntax. Because of that, there is no reason to assume that the grid.sync() in your kernel is working correctly.

            It's easy to see the grid sync is not working in your code by running it under cuda-memcheck. When you do that the results will get drastically worse.

            When I modify your code to do a proper cooperative launch, I have no issues on Tesla V100:

            Source https://stackoverflow.com/questions/63929929

            QUESTION

            Pass a jpeg image contents as a CUDA Texture
            Asked 2020-Nov-21 at 17:17

            Would like to pass the content from jpeg file (3 byte RGB) as a texture to a CUDA kernel but getting compilation error

            a pointer to a bound function may only be used to call the function

            on value.x = tex2D(_texture, u, v) * 1.0f / 255.0f; and the rest of the tex2D() calls.

            What may be the reason(s) for the error?

            Host side code where the texture is created:

            ...

            ANSWER

            Answered 2020-Nov-20 at 22:32

            There are several problems with the code you have now posted:

            1. after the discussion in the comments, hopefully you can figure out what is wrong with this line of code:

            Source https://stackoverflow.com/questions/64920483

            QUESTION

            `cublasIsamin` returns an incorrect value
            Asked 2020-Oct-18 at 20:41

            Arrays are stored as xyzxyz..., I want to get the maximum and minimum for some direction(x or y or z), and here is the test program:

            ...

            ANSWER

            Answered 2020-Oct-18 at 20:41

            cublasIsamin finds the index of the minimum value. This index is not computed over the original array, but also takes the incx parameter into account. Furthermore, it will search over n elements (the first parameter) regardless of other parameters such as incx.

            You have an array like this:

            Source https://stackoverflow.com/questions/64415165

            QUESTION

            CUDA C++ read image from host and copy to device
            Asked 2020-Oct-16 at 18:21

            I need read a image and store it into a unsigned char array and use the array to construct a class. The class construction is device function. so I need read the image and copy to device. The code is similar to below.

            ...

            ANSWER

            Answered 2020-Oct-16 at 18:21

            As indicated in the comments, &d_texture_data is a pointer to host memory (not managed memory, but host memory). Such a pointer to host memory is essentially unusable by CUDA device code (CUDA kernel code cannot dereference such host memory pointers, except in some cases on Power9 platforms).

            You don't need that level of indirection anyway. The most direct approach would be to use a methodology similar to what is shown here and just pass the "ordinary" managed pointer to your kernel. Since we're getting rid of the double-pointer approach, there are changes needed to the kernel also:

            Source https://stackoverflow.com/questions/64366481

            QUESTION

            Program hit cudaErrorIllegalAdress without cuda-memcheck error when running program with a large dataset
            Asked 2020-Sep-03 at 02:22

            I'm new to cuda and was working on a small project to learn how to use it when I came across the following error when executing my program:

            ...

            ANSWER

            Answered 2020-Sep-03 at 02:22

            Your in-kernel malloc operation are exceeding the device heap size.

            Any time you are having trouble with a CUDA code that uses in kernel malloc or new, it's good practice (at least as a diagnostic) to check the returned pointer value for NULL, before attempting to use (i.e. dereference) it.

            When I do that in your code right after the malloc operations in aligner::kmdist, I get the asserts being hit, indicating NULL return values. This is the indication you have exceeded the device heap. You can increase the device heap size.

            When I increase the device heap size to 1GB, this particular issue disappears, and at that point cuda-memcheck may start reporting other errors (I don't know, your application may have other defects, but the proximal issue here is exceeding the device heap).

            As an aside, I also recommend that you compile your code to match the architecture you are running on:

            Source https://stackoverflow.com/questions/63713831

            QUESTION

            CUDA Speed Slower than expected - Image Processing
            Asked 2020-May-20 at 21:50

            I am new to CUDA development and wanted to write a simple benchmark to test some image processing feasibility. I have 32 images that are each 720x540, one byte per pixel greyscale.

            I am running benchmarks for 10 seconds, and counting how many times they are able to process. There are three benchmarks I am running:

            • The first is just transferring the images into the GPU global memory, via cudaMemcpy
            • The second is transferring and processing the images.
            • The third is running the equivalent test on a CPU.

            For a starting, simple test, the image processing is just counting the number of pixels above a certain greyscale value. I'm finding that accessing global memory on the GPU is very slow. I have my benchmark structured such that it creates one block per image, and one thread per row in each image. Each thread counts its pixels into a shared memory array, after which the first thread sums them up (See below).

            The issue I am having is that this all runs very slowly - about 50fps. Much slower than a CPU version - about 230fps. If I comment out the pixel value comparison, resulting in just a count of all pixels, I get 6x the performance. I tried using texture memory but didn't see a performance gain. I am running a Quadro K2000. Also: the image copy only benchmark is able to copy at around 330fps, so that doesn't appear to be the issue.

            Any help / pointers would be appreciated. Thank you.

            ...

            ANSWER

            Answered 2020-May-20 at 21:50

            Two changes to your kernel design can result in a significant speedup:

            1. Perform the operations column-wise instead of row-wise. The general background for why this matters/helps is described here.

            2. Replace your final operation with a canonical parallel reduction.

            According to my testing, those 2 changes result in ~22x speedup in kernel performance:

            Source https://stackoverflow.com/questions/61873539

            QUESTION

            Nvidia GeForce GT420M is not being recognized
            Asked 2020-Apr-20 at 09:13

            I have installed latest cudatoolkit and driver today however when I try to build and run matrixMul program using visual studio 2019, I get the following error:

            [Matrix Multiply Using CUDA] - Starting… CUDA error at C:\ProgramData\NVIDIA Corporation\CUDA Samples\v10.2\common\inc\helper_cuda.h:775 code=35(cudaErrorInsufficientDriver) “cudaGetDeviceCou nt(&device_count)” C:\ProgramData\NVIDIA Corporation\CUDA Samples\v10.2\0_Simple\matrixMul…/…/bin/win64/Debug/matrixMul.exe (process 7140) exited with code 1.

            More information about the setup: 1: per Nvidia control panel driver version is 391.35

            2: GPU GeForce GT 420M which is cuda 2.1 as per https://developer.nvidia.com/cuda-gpus#compute

            3: Visual Studio 2019

            4: The program i am trying to build/run is C:\ProgramData\NVIDIA Corporation\CUDA Samples\v10.2\0_Simple\matrixMul\matrixMul_vs2019.sln

            5: with a bit of debugging it appears that program is failing at line checkCudaErrors(cudaGetDeviceCount(&device_count)); inside cuda_runtime_api.h @ line 1288. The function is supposed to returns the number of devices with compute capability

            greater or equal to 2.0 Apparently it sounds like GeForce GT420M is Cuda 2.1 capable but current runtime is not recognizing it and failing. Could someone please help me to resolve this error?

            ...

            ANSWER

            Answered 2020-Apr-15 at 13:33

            Your device (compute capability 2.1) is not supported by CUDA 10.2. You need to install a lower version of CUDA toolkit that supports it. The last CUDA version that supports compute capability 2.x is CUDA 8.

            Source https://stackoverflow.com/questions/61227997

            QUESTION

            How to understand that convert half-precision pointer to unsigned long long pointer and relevant memory alignment?
            Asked 2020-Feb-22 at 12:30

            I am not familiar with the problems about memory alignment and pointer conversion. I am learning from the Nvidia official sample code as the following.

            ...

            ANSWER

            Answered 2020-Feb-22 at 12:30

            But how should I understand the conversion from half* to unsigned long long*?

            There is no conversion to unsigned long long * in the code you show. There is a conversion to unsigned long long.

            The purpose of the conversion is to convert the address stored in one of A, B, C, or D to an integer so that its bits may be examined. The C standard does not define the result of converting a pointer to an integer type except for some basic properties, but the conversion is “intended to be consistent with the addressing structure of the execution environment” (C 2018 footnote 69). In the compiler Nvidia uses, the conversion presumably produces the address as normally used by the processor architecture. Then using % 128 == 0 tests whether the address is aligned to a multiple of 128 bytes.

            Why do we need to convert to unsigned long long* first and then check if the memory is aligned with 128?

            The % operator will not accept a pointer operand, so the operand must be converted to an integer type, unsigned long long, not unsigned long long *.

            Source https://stackoverflow.com/questions/60351975

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