xmm | Trading Bot for Ripple Network | Cryptocurrency library

Originally I was trying to reproduce the effect described in Agner Fog's microarchitecture guide section "Warm-up period for YMM and ZMM vector instructions" where it says that:

The processor turns off the upper parts of the vector execution units when it is not used, in order to save power. Instructions with 256-bit vectors have a throughput that is approximately 4.5 times slower than normal during an initial warm-up period of approximately 56,000 clock cycles or 14 μs.

I got the slowdown, although it seems like it was closer to ~2x instead of 4.5x. But what I've found is on my CPU (Intel i7-9750H Coffee Lake) the slowdown is not only affecting 256-bit operations, but also 128-bit vector ops and scalar floating point ops (and even N number of GPR-only instructions following XMM touching instruction).

Code of the benchmark program:

Issue : I have 7 images in a list (with different size, resolution and format). I am adding an mp3 audio file and fade effect while making a slideshow with them, as i am trying to do it by following command

As I understand, since AVX, trough the 3-Byte VEX or EVEX prefix, you can encode up to 32 XMM/YMM/ZMM registers in 64-bit mode, but when looking trough the Intel manual past the fact that it tells you that is possible, I cannot find the part where it explains how that actually occurs. There is only one extension field that I can see, which is the REX inverted fields, but not anything else, aside from a special place in the EVEX prefix to encode mask registers.

You would need 2 bits somewhere to encode that many registers. Do you have to combine 2 of the inverted REX fields inside the VEX/EVEX prefixes somehow, or how does this process work?

I am studying AVX-512. I have a question about VORPS.

The documentation says like this:

EVEX.512.0F.W0 56 /r VORPS zmm1 {k1}{z}, zmm2, zmm3/m512/m32bcst

Return the bitwise logical OR of packed single-precision floating-point values in zmm2 and zmm3/m512/m32bcst subject to writemask k1.

EVEX encoded versions: The first source operand is a ZMM/YMM/XMM register. The second source operand can be a ZMM/YMM/XMM register, a 512/256/128-bit memory location, or a 512/256/128-bit vector broadcasted from a 32-bit memory location. The destination operand is a ZMM/YMM/XMM register conditionally updated with writemask k1.

Ref: https://www.felixcloutier.com/x86/orps

What does "subject to writemask k1" mean?

Can anyone give a concrete example of k1 contribution in this instruction?

I wrote this code to do some experiment about VORPS: https://godbolt.org/z/fMcqoa

I am adding video stream capture functionality to a Xamarin Forms project. I am trying to use VLC's LibVLCSharp.Forms (https://github.com/videolan/libvlcsharp) package and the Mobile ffmpeg Xamarin wrapper package, Laerdal.Xamarin.FFmpeg.* (https://github.com/Laerdal/Laerdal.Xamarin.FFmpeg.iOS). However, the internal ffmpeg library from VLC is conflicting with the ffmpeg wrapper and is built with different flags which exclude functionality that I need.

For native development, it looks like you can configure a preferred library with the OTHER_LDFLAGS flag in the Pods-.debug.xcconfig file but I don't see where to do that with Xamarin.Forms. Source: https://github.com/tanersener/mobile-ffmpeg/wiki/Using-Multiple-FFmpeg-Implementations-In-The-Same-iOS-Application

How can I configure Xamarin iOS builds to prefer the mobile ffmpeg library over the VLC ffmpeg library? If I am able to use the mobile ffmpeg library, will it cause issues with VLC?

Here is a log message when I try to run commands with ffmpeg. As you can see, ffmpeg's internal library paths reference "vlc":

I'm working on a script that can do a few quick calculations that I usually do by hand. The string below varies because it is an item description but the format comes in two types typically. I need a way of parsing out the xMM from the rest of the script because it's what I need to the calculations and can get it from there. I've tried using partition and some different .split() combinations but I'm not sure that I'm understanding the finer inner workings on how they function.

The bold numbers vary but the info I'm trying to parse will always be (*)*MM. If that helps.

I want to truncate a floating-point number in one of the xmm registers to a 64-bit register, as stated by the title. Below I am dividing 15.9 by 4.95. I'm printing this out and I see that result is correct (3.212121). However, when using cvtss2si to truncate this, rdi is becoming zero in some way. I have no idea why. Why does this not truncate properly when I am expecting 3 as a result? I am on macOS assembling with Clang.

All the four _mm256_broadcastb_epi8, _mm_broadcastw_epi16, _mm256_broadcastd_epi32 and _mm256_broadcastq_epi64 functions are intrinsics for VPBROADCASTB, VPBROADCASTW, VPBROADCASTD and VPBROADCASTQ instructions accordingly. According Intel's documentation: "Intel® Advanced Vector Extensions Programming Reference", those instructions may receive a 8-bit, 16-bit 32-bit, 64-bit memory location accordingly.
Page 5-230:

The source operand is 8-bit, 16-bit 32-bit, 64-bit memory location or the low 8-bit, 16-bit 32-bit, 64-bit data in an XMM register

However, the intrinsic API (of Intel, MSVS and gcc) for those instructions receives a __m128i parameter. Now if i have a variable of basic type, supposedly 'short', what is the most efficient and cross-platform way (At least between MSVS and gcc) to pass that variable to the according broadcast intrinsic (_mm_broadcastw_epi16 in case of short)?

For Example:

I try to create a video with ffmpeg and save it to the device with gallery_saver package for Flutter.

The ffmpeg command works well and the video is created. But GallerySaver does not save it. As result I get no error, but a false boolean for the success argument.

This is the ffmpeg output. Is this a valid video mp4 file?