icestorm | Project IceStorm - Lattice iCE40 FPGAs Bitstream

I guess you can use separate counters for each clk_1khz and signal. Then just add them:

You need to run the IceStorm service to be able to connect to it, IceStorm/TopicManager is an object hosted by IceStorm service.

if you want to define the topic manager using a property you should use communicator.propertyToProxy instead of communicator.stringToProxy and define the proxy in the configuration file used to initialize the configuration.

This pattern of asynchronous resets is not permitted by the IEEE synthesis standard (1364.1). Only an if statement can be used thus:

I am aware of SwapForth, which I believe is a Forth interpreter which runs on the J1 CPU itself

You are wrong here. SwapForth is an interactive compiler, not the interpreter.

Maybe it does more than you need - handling dictionaries, accepting new code from the UART (after all, it's a complete Forth system), which you might not need at all, but that doesn't make it an interpreter.

To compile your own code, run gforth cross.fs basewords.fs your_prog.fs. Note that cross.fs is quite minimalistic, and doesn't even provide variable/value words. But you can easily add those (and many more) directly to cross.fs.

See https://github.com/cliffordwolf/icestorm/tree/master/examples/icestick for an example. The "rs232demo" project comes with a test bench and the Makefile contains rules for pre- and post-synthesis simulation:

Nothing prevents you from subscribing to an Ice topic and retrieving a topic proxy to another one.

Does that mean that these blocks don't exist?

It means those blocks are not connected to actual IO pins. I would assume they still exist on the silicon. But since I've never looked at the actual die, I have no way of knowing.

However, I'd like to cross-check this information if possible.

See the .pins tq144 section of chipdb-1k.txt. For example:

I'm a bit concerned about damaging the FPGA with an invalid bitstream. Are there situations where this is known to happen? Is there a way to simulate a bitstream?

I have not damaged any FPGA so far. (I have, however, managed to damage the serial flash on one icestick after running some test that reprogrammed it in a loop.)

But this does not mean that you cannot damage your FPGA by programming it with an invalid bitstream. You could theoretically configure the FPGA in a way that produces a driver-driver conflict. I don't know how well the hardware deals with something like that. I have not run any experiments to find out..

Also, it would be helpful to have some kind of “higher-level” explanation format which e.g. shows the IE/REN bits on the I/O blocks to which they correspond, not the one on which they have to be set in the bitstream. Is there such a format?

icebox_vlog produces a higher-level output. But it does not output things like I/O blocks, so it might be too high-level for your needs.

I know of the possibility to generate an equivalent Verilog circuit, but the problem with this is that it doesn't usually allow me a lossless round-trip back into a bitstream. Is there a way to generate an equivalent Verilog circuit which (e.g. by instantiating the blocks explicitly) yields the exact same bitstream when processed with Yosys/arachne-pnr?

Not at the moment. But it should not be too hard to extend icebox_vlog to provide this functionality. So if you really need that, it might be something within your reach to add yourself.

I don't have the solution yet but iCE40ProgrammingandConfiguration.pdf http://www.latticesemi.com/view_document?document_id=46502 on page 12 says:

Upon initial power-up, the start address is always 0x00_0000. After waiting eight additional clock cycles, the iCE40 device begins reading serial data from the SPI PROM.

So it looks like programming the .bin file from 0 should have worked.

I've tried programming with the iceutil programmer that comes with icecube2, as described in iCEblink40HX1KEvaluationKitUsersGuide.pdf http://www.latticesemi.com/view_document?document_id=45922

FPGA Bitstream Configuration File The required bitstream image is part of the iCEcube2 project. Multiple versions of the bitstream are stored in the _Implmnt\sbt\outputs\bitmap directory. The raw hexadecimal version of the bitstream is called _bitmap.hex. The alternate format of the same information is an Intel hexadecimal file called _bitmap_int.hex. Raw Hexadecimal Command Example /iceutil -d iCE40 -res -cr -m M25P10A -fh -w _bitmap.hex Intel Hexadecimal Command Example /iceutil -d iCE40 -res -cr -m M25P10A -fi -w _bitmap_int.hex

I presume that my file should be programmed as a binary file, using -fb