nand2tetris | My attempt at the nand2tetris course | Learning library

 by   freespace Python Version: Current License: MIT

kandi X-RAY | nand2tetris Summary

kandi X-RAY | nand2tetris Summary

nand2tetris is a Python library typically used in Tutorial, Learning applications. nand2tetris has no bugs, it has no vulnerabilities, it has a Permissive License and it has low support. However nand2tetris build file is not available. You can download it from GitHub.

Chapters are checked off as they are (a) implemented and passes the supplied tests. Chapter 1 Chapter 2 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 Chapter 8.
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            kandi-support Support

              nand2tetris has a low active ecosystem.
              It has 13 star(s) with 0 fork(s). There are 2 watchers for this library.
              OutlinedDot
              It had no major release in the last 6 months.
              nand2tetris has no issues reported. There are no pull requests.
              It has a neutral sentiment in the developer community.
              The latest version of nand2tetris is current.

            kandi-Quality Quality

              nand2tetris has 0 bugs and 0 code smells.

            kandi-Security Security

              nand2tetris has no vulnerabilities reported, and its dependent libraries have no vulnerabilities reported.
              nand2tetris code analysis shows 0 unresolved vulnerabilities.
              There are 0 security hotspots that need review.

            kandi-License License

              nand2tetris is licensed under the MIT License. This license is Permissive.
              Permissive licenses have the least restrictions, and you can use them in most projects.

            kandi-Reuse Reuse

              nand2tetris releases are not available. You will need to build from source code and install.
              nand2tetris has no build file. You will be need to create the build yourself to build the component from source.
              Installation instructions, examples and code snippets are available.
              It has 3054 lines of code, 203 functions and 9 files.
              It has medium code complexity. Code complexity directly impacts maintainability of the code.

            Top functions reviewed by kandi - BETA

            kandi has reviewed nand2tetris and discovered the below as its top functions. This is intended to give you an instant insight into nand2tetris implemented functionality, and help decide if they suit your requirements.
            • Assemble assembly instructions
            • Replace occurrences of target with replacement
            • Optimize options
            • Try to optimise a list of instructions
            • Translate VM text into Operation objects
            • Return a list of macros
            • Parse a source code block
            • Resolve the segment
            • Validate segment index
            • This function tests the stack
            • Translate VM text into a list of Operation objects
            • Test whether there is no nop between two M instructions
            • Test for optimized optimise unneeded
            • Set macroos
            • Test if the optimisation function is correct
            • Test if the module should be optimized
            • Resolve the expression
            • Test if optimise unneeded
            • Test for function call_macro
            • Test if optimise is used
            • Test for multidimensional assignment
            • Resolve symbols
            • Test if this macro is done
            • Resolve the variable
            • Test if the symbol is valid
            • Test the addition
            • Test if we have a Jacobian macro
            Get all kandi verified functions for this library.

            nand2tetris Key Features

            No Key Features are available at this moment for nand2tetris.

            nand2tetris Examples and Code Snippets

            No Code Snippets are available at this moment for nand2tetris.

            Community Discussions

            QUESTION

            Dmux4Way is producing error in line 7: error from Hardware Simulator?
            Asked 2022-Feb-24 at 16:36

            Did I miss anything or is Hardware Simulator wrong? The simulator is producing error! Please can you run this and see the error. Please can you run this and see the error. Please can you run this and see the error.

            ...

            ANSWER

            Answered 2022-Feb-24 at 16:36

            Your chip is producing the wrong result when in=1 and sel[2]=01 and also when in=1 and sel[2]=11 (line 8). If you single-step the simulator, you will see that when you do the tests, the output pin that gets set doesn't increment the way you want it to.

            So why is that? It has to do with misunderstanding what bits in sel are referred to by sel[0] and sel[1]. Sel[0] is the rightmost, least-significant bit in sel. Sel[1] is the leftmost, most-significant bit. Your chip assumes the opposite.

            Don't feel bad, this kind of mistake has bitten every programmer at least once.

            See also: https://en.wikipedia.org/wiki/Endianness

            Source https://stackoverflow.com/questions/71253370

            QUESTION

            Encounter [0]: sub bus of an internal node may not be used when implementing Not16 with Not
            Asked 2022-Feb-19 at 03:42

            When I was implementing Not16 with Not gates:

            ...

            ANSWER

            Answered 2021-Nov-20 at 14:19

            I believe you have typos in your Not components. The in should be in the form in=in[x], not in=[x] as you have it currently.

            Conversely, your Nand components are properly formatted.

            Source https://stackoverflow.com/questions/70046699

            QUESTION

            Why does the order of the lines of code not matter in Hardware Description Language?
            Asked 2022-Feb-01 at 17:58

            Per the nand2tetris course material, "Since the language is designed to describe connections rather than processes, the order of the PARTS statements is insignificant: as long as the chip-parts are connected correctly, the chip will function as stated."

            How does the sequence of the code below not matter though given that the carry bits are calculated using the carry bits of previous bit calculations?

            ...

            ANSWER

            Answered 2022-Feb-01 at 06:48

            Because all the calculations are being computed concurrently. In an hdl each instance of a block/entity/module create an instance of all the behaviors inside. You didn't specify which one you're using, but almost all behave the same.

            Source https://stackoverflow.com/questions/70935195

            QUESTION

            How to set jump condition for an 8-bit computer?
            Asked 2021-Sep-06 at 20:46

            I have been taking a course called nand2tetris. In it, we build a 16-bit computer, and in each instruction, the first bit chooses address mode or command mode, i.e., if it's 0, then we load the address register, if it's 1, we execute an instruction. The last 3 bits specify the jump condition (based on ALU output) like so:

            ...

            ANSWER

            Answered 2021-Sep-06 at 20:46

            Do you have any free opcodes in aaaa?

            If so, you might add an "is-greater-than-0" and an "is-greater-than-or-equal-to-0" opcodes.  These would check, say, the D register's value and replace it with a boolean 1 or 0.

            So, your compare sequence is to subtract two items, then use one of these opcodes, and your conditional jump on zero.

            You can swap the operands to subtraction to get the other relations (less than, less than zero).

            You can also subtract 1 from a boolean to reverse it (make true 0 and make false non-zero).

            Alternatively, you can shift away all but the sign bit, i.e. logical shift right by 15 bits will move the sign bit to the low bit position — that will give you 0 for >= 0 and 1 for < 0.  (An arithmetic shift by 15 bits right would give 0 for >= 0 and -1 for < 0.)

            As @Peter points out, compare instructions can operate without risk of overflow.  MIPS provides for a single compare, slt, which stand for set less than.  MIPS also provides for branch on condition true as well as branch on condition false.  That, combined with the ability to swap the operands, allows for all 4 relational operations (<, <=, >, >=).

            Source https://stackoverflow.com/questions/69076800

            QUESTION

            How to implement nand2tetris processor on a real FPGA?
            Asked 2021-Mar-18 at 14:19

            I followed the nand2tetris course (https://www.nand2tetris.org/course) with the main intent to learn how to build a soft processor on a real FPGA.

            While the course was simple enough, now that I am starting with the FPGA implementation I feel a bit lost.

            I bought an Intel de10 nano FPGA(http://de10-nano.terasic.com/), and, having some Verilog knowledge from Uni, I was able to download "Quartus Prime Lite" and bootstrap with simple things like led blinking, etc...

            However, when it comes to implement the processor there are several things that are not clear to me:

            • How do I implement data memory? I saw there is a DDR3 module attached to the HPS of the FPGA. Is this something I need to directly use? Could I simply use a big 16bit register vector in HDL?
            • How do I implement the ROM from where the program is read? And how can I store the binary I assembled to then bootstrap the fetch-decode-execute loop?
            • How do I implement the screen and the keyboard? Indeed, there is also an HDMI controller on the board: do I have to implement all the logic myself?

            Those are the main questions I am struggling with at the moment. Could you point me out to any resource useful for a complete novice?

            Thanks,

            ...

            ANSWER

            Answered 2021-Mar-16 at 16:41

            For something as simple as a CPU from nand2tetris you'll be just ok with block RAMs, there's plenty of it on DE10Nano, likely enough for all your needs. Plus some more distributed memory.

            In case if you still want an access to DDR, DE10Nano is an SoC, with a hard DDR controller managed by the processor subsystem. It's very easy to interface with it over an Avalon bus (don't bother with AXI unless you really need maximum possible performance).

            For the ROM, just use LUTs. A simple static case in Verilog will be translated into an efficient LUT-based ROM.

            For accessing HDMI on DE10Nano, you can take a look at this example: https://github.com/combinatorylogic/soc/blob/a1d282d793548030cba940496bed90ff3a29c0ba/backends/c2/hw/de10nano/vga1080p.v (you can also take a look at the DDR access in the same project). Before you can use HDMI you'll need to set up the ADV7513 chip over i2c, see a copy of a library from Terasic under the same project.

            For a monochrome 800x600 video you'll be ok with a block RAM. For higher resolutions, as in the example above, you'll have to use DDR.

            Source https://stackoverflow.com/questions/66627417

            QUESTION

            The logic of designing a HDL parts from the beginning : DM
            Asked 2021-Feb-25 at 01:03

            I am taking the nand2tetris coursera course. I am trying to understand how you guys, can design the underlying mental process of finding the HDL core parts. For exemple, let's take the DMUX4way. What is the complete mental process to achieve the parts? I understand the logic behind once I see the result but I have difficulties to find out by myself Thanks

            ...

            ANSWER

            Answered 2021-Feb-25 at 01:03

            I find that it helps to break things down, and in complex situations, write down the truth table for the various signals (including the intermediate signals). Sometimes this will lead to an "aha" moment where you see a connection you can use to simplify things.

            You may also find it helpful to draw a graph that maps the flow of the signals through the circuit.

            Finally, the adage that "first make it work, then make it pretty" applies. Once you have something working, you can look at the design and find simplifications and optimizations. A good example of this is building the XOR circuit. Once you have the straightforward version, if you look at it hard, you can find the clever optimization.

            I suppose it is just one of those things where you have to practice until you get the knack of it. You may find it useful to revisit earlier projects with an eye to making them cleaner and easier for you to understand. There are often several ways to build the required circuit, but some ways may be more comprehensible to you. Also, I would recommend you get in the habit of commenting your designs; it is helpful to have a reminder what you were thinking when you did something.

            Source https://stackoverflow.com/questions/65699588

            QUESTION

            Logical expression that can catch i'th bit in 16-bit binary that corresponds to an integer value?
            Asked 2021-Feb-04 at 14:26

            I'm currently working on the last project in Nand2Tetris course.
            I've been trying to figure out how the logic expression works while implementing a bit-wise calculation.

            How Python can catch the right digits of 16-bit binary that correspond to an integer y when the twoToThe[i] == 0 (5 is 101 in binary, thus twoToThe[0] == 0 and twoToThe[2] == 0 are False and it's the right answer)
            but why does not show the exact opposite result when twoToThe[i] == 1?
            I thought it would return True on both twoTwoThe[0] == 1 and twoTwoThe[2] == 1

            Here's code below

            ...

            ANSWER

            Answered 2021-Feb-04 at 09:24

            The y & twoToThe[0] expressions evaluates to a new integer (as a result of a bitwise and operation between the bits of 5 and the bits of twoToThe[i]), not to a boolean as I think you were expecting. Check it:

            Source https://stackoverflow.com/questions/66041305

            QUESTION

            C++ regex capture group confusion
            Asked 2021-Jan-16 at 00:05

            I'm implementing the nand2tetris Assembler in C++ (I'm pretty new to C++), and I'm having a lot of trouble parsing a C-instruction using regex. Mainly I really don't understand the return value of regex_search and how to use it.

            Setting aside the various permutations of a C instruction, the current example I'm having trouble with is D=D-M. The result should have dest = "D"; comp = "D-M".

            With the current code below, the regex appears to find the results correctly (confirmed by regex101.com), but, not really correctly, or something, or I don't know how to get to it. See the debugger screenshot. matches[n].second (which appears to contain the correct comp value) is not a string but an iterator.

            Note that the 3rd capture group is correctly empty for this example.

            ...

            ANSWER

            Answered 2021-Jan-16 at 00:05

            gcc warns about unknows escape sequence \- Demo.

            You have to escape \,

            Source https://stackoverflow.com/questions/65745013

            QUESTION

            chip Mux4way16 not run ontil the end on ‏HardwareSimulator (VHDL)
            Asked 2021-Jan-12 at 20:46

            I'm tryng to build this chip:

            ...

            ANSWER

            Answered 2021-Jan-12 at 20:15

            Your logic for selecting what input to pass through appears to be incorrect. You should test it by creating a truth table for finalSel, notFinalSel, aAndB, cAndd and out for each of the 4 control conditions.

            In general, when doing these kinds of problems, the KISS principle holds; Keep It Simple and Stupid. You don't need any fancy logical manipulation of your sel[] bits, you can just use them directly. So once you get your version fixed (and understand where you went wrong), try doing a version that just consists of 3 Mux16's and nothing else. Once you have both versions working, you'll then understand the error that caused you to go down the wrong path in your first attempt, and that will be a valuable lesson going forward.

            Have fun!

            Source https://stackoverflow.com/questions/65690709

            QUESTION

            Confusion related to virtual machine in nand2tetris
            Asked 2020-Dec-15 at 00:33

            So while doing a course on nand2tetris I got stuck in this question.

            Basically this question is related to building a virtual machine. The virtual machine is quite similar to JVM.

            ...

            ANSWER

            Answered 2020-Dec-15 at 00:33

            There are 2 main parts to consider here:

            1. call foo 2 : this instruction tells vm to call funcion foo that takes 2 arguments ( which should be pushed on top of the stack before this call ).
              Calling any function means that you should take these steps as follow: push return address on top of stack (SP++), then push LCL, ARG, THIS,THAT ( SP+4). At this point SP should equal 310.
            2. function foo 4 : this is NOT the first instruction in function foo, but still it has an effect on SP as this means that functionfoo has 4 local variables. And these variables must be located somewhere. Where? On top of the stack. This means that before first 'real' instruction of foo gets executed, we must push 4 values onto the stack. What values? Well - according do vm specification it should be 0's, resulting in local variables being initiated to 0. This also means that we increase SP for every local variable ( SP + 4)

            This leads to conclusion that SP, after calling foo but before executing 1st instruction of this function will have value of 314.

            Source https://stackoverflow.com/questions/65292819

            Community Discussions, Code Snippets contain sources that include Stack Exchange Network

            Vulnerabilities

            No vulnerabilities reported

            Install nand2tetris

            Install using brew cask install gtkwave. Install Switch perl module into system dir: sudo cpan install Switch. If required fix up permissions in /Library/Perl, e.g. Replace /usr/local/bin/gtkwave with symlink to /Applications/gtkwave.app/Contents/Resources/bin/gtkwave. When you type gtkwave in the commandline it should launch the app.
            Install using brew cask install gtkwave
            Install Switch perl module into system dir: sudo cpan install Switch
            If required fix up permissions in /Library/Perl, e.g.
            Replace /usr/local/bin/gtkwave with symlink to /Applications/gtkwave.app/Contents/Resources/bin/gtkwave

            Support

            For any new features, suggestions and bugs create an issue on GitHub. If you have any questions check and ask questions on community page Stack Overflow .
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